* 68HC11Ax Analog to digital converter software
*
* Assemle with the command:
* as11 adc.asm -l > asm.lst
*
REGS 	EQU	$1000		* Register stack
TOF	EQU	%10000000	* Timer overflow flag
N1	EQU	300		
TFLG2	EQU 	$25		
OPTION	EQU	$39
ADCTL	EQU	$30
ADR1	EQU	$31
ADSET	EQU	%00000100	* A/D input on PE-4
CCF	EQU	%10000000	* Conversion complete flag
ADPU	EQU	%10000000	* A/D power-up bit
*				* Monitor Equates
OUTLHF	EQU	$FFB2 Print left half
OUTRHF	EQU	$FFB5 Print right half
CRLF	EQU	$FFC4 Print CRLF
*				* Memory Map Equates
CODE	EQU	$2000
DATA	EQU	$4000
STACK	EQU	$0040
*
*
	ORG CODE
	LDX 	#REGS	

* Power up the A/D converter charge pump
	BSET	OPTION,x ADPU
*
	JSR	delay100us
*
* Start the conversion SCAN=0, MULT=0
FOREVER			
* Beginning of LOOP-FOREVER	
	LDAA	#ADSET	* Select ADC input from Port E-4
	STAA	ADCTL,x	* Signal ADC to start conversion
*
* Wait until conversion done
convwait:	
	BRCLR 	ADCTL,x	CCF convwait
*
* Get the input and print it using the BUFFALO Monitor
	LDAA	ADR1, x	* Get ADC converted input voltage value
	TAB		* save it (A) in B
*
	JSR	OUTLHF 	* output high nybble
	TBA		* restore it to A
	JSR	OUTRHF	* output low nybble
	JSR	CRLF	* output carriage return - line feed
*
* Delay approx 1 second using the timer overflow
*	LDAB	#N1
* Clear the TOF to start the delay
delay1:	
*	ldaa	#TOF
*	staa 	TFLG2,x
* and wait for N1 overflows
*
spin1: 	
	TST	TFLG2,x	
	BPL	spin1
*
	DECB
	BNE	delay1
	BRA	FOREVER	* loop forever

* ------------------------------------------------------------------------------------
* This subroutine delays (a little over) 100 micro-seconds 
* ------------------------------------------------------------------------------------
delay100us:
	psha		* save Accumulator A
*			* Generate a "short" delay > 100 microsec
	LDAA	#40  	* 40 loops for 200 clock cycles at 0.5 micro seconds/clock	
DELAYLOOP:		
	DECA		* 
	BNE	DELAYLOOP
	pula		* restore Accumulator A
	RTS		*